• IMPROVING REAL TIME PERFORMANCE FOR HDTV APPLICATIONS

D. S. Rao*, Kiran Kumar Jembula, Titu Singh Arora, Vishal Chandel, Chetan Kumar Sule

Abstract


The Objective of my paper is to develop an efficient architecture for the ARPS algorithm that could reach the real time performance for HDTV applications. The architecture is targeted for FPGA. At present we have developed the architecture which could achieve half the real time performance of 15 frames per second. The architecture is based on six processing elements and is also extendable to any number of processing elements with little modifications. The proposed architecture could reach the real time performance if it could employ more number of processing elements. As we double the number of processing elements the frame rate doubles upto certain point.


Keywords


BMA’s, PSNR, ASIC, HDTV.

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